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SemiAnalysis· @SemiAnalysis_ · X·· 21 天前AI 评分40
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随着中介层与基板接近横向微缩极限,2.5D 封装正走向 3.5D,通过更紧密的 D2D pitch、更高带宽密度和更低每比特能耗突破 reticle 限制。集成密度提升使良率对经济性愈发关键,最终良率在各工艺步骤间复合相乘。更多 HBM 堆叠、Chiplet(芯粒)与键合界面推高集成复杂度,且部分缺陷在流程后段才被发现,凸显了先进检测在整个集成流程中的重要性。

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正文

As interposers and substrates approach their scaling limits, 2.5D packaging is moving toward 3.5D, with tighter D2D pitch, higher bandwidth density, and lower energy per bit to overcome reticle-driven constraints on lateral scaling.

Higher integration density makes yield increasingly critical to economics. Final yield compounds across process steps, so losses at any stage directly affect overall yield.

More HBM stacks, chiplets, substrates, and bonding interfaces increase integration complexity, while some defects are detected only late in the process flow. This tightens process-control requirements across the integration flow and increases the importance of advanced inspection.

来源:SemiAnalysis · x.com